#ifndef POWER_CONTROL_H_
#define POWER_CONTROL_H_

#define POWER_SEQUENCE_DELAY_MS		(2u)
#define DDIC_RESET_DELAY_MS			(10u)
#define OLED_RESET_DELAY_MS			(25u)

typedef enum {
    PowerRail_VoledP,
    PowerRail_VoledN,
    PowerRail_1V,
    PowerRail_1V8 // NOTE: only available for BS1. Replaced by FPGA reset in BS2
} PowerRail_t;

void Power_Control(PowerRail_t rail, bool power_on);
void VXR_Power_Control_On(void);
void VXR_Power_Control_Off(void);
void Panel_Power_Control(bool t);
void Full_Panel_Shutdown(void);
void Panel_Reset(void);
void Power_Safe_Shutdown(void) ;

#endif /* POWER_CONTROL_H_ */