{
  "summary": "Both arm 5’s 45s test barrier and the product’s independent 10s eligibility poll expired. The arm-5-specific UNPRESENTED at log:390 proves the latter; final controllable=true does not prove the complete inject predicate held during that poll. 79.834s versus prior 38.159s is consistent with paying the full outer delivery wait, but duration alone cannot distinguish stall from a race.",
  "files": [
    {
      "path": ".worktrees/hertz-304-phase-b/crates/spt/tests/er_briefing_presented_e2e.rs",
      "description": "Waits, inter-seat restart, before-teardown snapshots, deferred assertions; key ranges 104-129, 303-379, 439-481, 553-806."
    },
    {
      "path": ".worktrees/hertz-304-phase-b/crates/spt-daemon/src/broker.rs",
      "description": "Independent detached presentation worker and 10s/200ms eligibility poll; 2226-2289."
    },
    {
      "path": ".worktrees/hertz-304-phase-b/crates/spt-daemon/src/inject.rs",
      "description": "Complete eligibility predicate at 37-50: online AND no resolvable relay AND controllable=true."
    },
    {
      "path": ".worktrees/hertz-304-phase-b/crates/spt/tests/common/mod.rs",
      "description": "output_bounded command-child deadline, 10ms polling, cleanup and pipe joins at 195-260."
    },
    {
      "path": ".spt/preserved/304-handoff/consumer-windows-7890ead3/attempt2-phase-b.log",
      "description": "Completed failure block only: duration 43/55, snapshot 188-190, actual arm-5 daemon generation 325-392, panic 395-397."
    },
    {
      "path": ".spt/preserved/304-handoff/consumer-windows-7890ead3/attempt1-phase-b.log",
      "description": "Prior duration only: line 42 PASS 38.159s (rounded 38.2s)."
    }
  ],
  "architecture": "Test performs happy-path and unseated checks first, then intentional unbound miss, same-home daemon restart, and bound new-session delivery. Product presentation runs detached from subscribe handling with its own eligibility deadline; the test merely polls spool delivery and does not extend or restart that worker.",
  "report": "## Scope and notation\nRead-only analysis against the supplied source snapshot 7890ead39bb7f14ed44aaae44b0951f098ffe9ac; no builds, tests, target/process access, or edits. T = .worktrees/hertz-304-phase-b/crates/spt/tests/er_briefing_presented_e2e.rs; B = corresponding crates/spt-daemon/src/broker.rs; I = corresponding inject.rs; L2/L1 = supplied attempt2/attempt1 logs. No independent commit-history verification was performed.\n\n## Timing table\n| Phase | Bound / cadence | Evidence and observed result |\n|---|---|---|\n| Every ceremony (arms 1, 2, 4; not 5) | 30s captured-command deadline | T:368-379; calls T:411,474,569. All completed before the observed final assertion. This is not a fixed sleep. |\n| Every broker readiness (arms 1, 2, 4, 5) | 30s; sample every 100ms, final readiness read after loop | T:120-128,319-346; arm4/5 calls 570,640. Arm4 ready diagnostic 1724ms (L2:211); arm5 1712ms, including exe hash 1711ms (L2:340). These are daemon-reported internal phase durations, not full spawn_broker call timings. |\n| Happy-path arm1 delivery | 30s; every 150ms | T:439-449; success assertions completed before arms4/5. Actual wait not printed. |\n| Unseated negative arm | Fixed 3s sleep | T:479-481. |\n| Every reap | daemon stop child deadline 20s; taskkill/output and child waits have no explicit local deadline | T:104-112,350-365; common/mod.rs:195-260 polls child every 10ms and joins captured pipes. Four reap invocations: T:465,481,636,684. These are upper-bound command waits, not 20s fixed delays; process kills/waits and pipe joins can add time. |\n| Arm4 loud-miss test barrier | 45s; every 200ms | T:590-595 and 303-316. Observed Some(12.9071048s), L2:188; **did not expire**. Timer starts after rc4 spawn, so includes cold bring-up plus presentation worker wait plus sampling. T:725-729 only checks this elapsed observation is at least 9s. |\n| Arm4 product eligibility | 10s; every 200ms | B:2226-2243. Specific ineligible-target UNPRESENTED at L2:255 proves the worker reached its unsuccessful deadline branch (not the translation-drain failure branch). No timestamp on that diagnostic. |\n| Inter-seat transition | Repoint adapter to dummy/rank1001, kill/wait rc4, reap old tree, remove brain.ready, spawn/readiness new tree | T:616-640; same home preserves spool. Outside arm5’s 45s timer. Old controller detach L2:323 wall_ms=1789398243891; new brain query L2:341 wall_ms=1789398246382: 2.491s between these markers, **not** a complete cleanup measurement. |\n| Arm5 product bring-up | Log advertises ready_wait_s=30, separate from presentation wait | L2:342. Actual ER_LAUNCH spawned t_ms=3367; SPAWN row_inserted t_ms=3366 (L2:368-369). Bring-up did not fail its readiness bound. |\n| Arm5 test delivery barrier | 45s; every 150ms | T:659-671. Predicate is some briefing row with id != retained_id AND delivered=true. None plus panic T:782 proves loop exhausted its deadline rather than succeeding. Final resnapshot T:672 still showed row2 undelivered (L2:190,397), ruling out merely failing to store a delivered row from the loop’s final sample. |\n| Arm5 product eligibility | Independent 10s; every 200ms, starts inside detached thread | B:2227-2243. **Expired**, established by the new daemon’s ineligible-target UNPRESENTED L2:390. Product does not spend 45s trying: after this branch it returns at B:2280. |\n| Final snapshot → cleanup → verdict | Snapshot, stderr read, rc5 kill/wait, reap, temp-home drop, diagnostics, assertions | T:672-685,688-806. Panic appears only after cleanup; 79.834s is not a presentation timer or time-to-failure snapshot. |\n| Whole test | FAIL 79.834s vs prior PASS 38.159s | L2:43 (libtest 79.82s at :55), L1:42. Difference 41.675s. |\n\n## Duration accounting\nFACT: arm4 spent 12.9071048s waiting for its expected loud miss. FACT: arm5 exhausted the 45s delivery barrier. Those serial waits alone consume at least approximately 57.907s; the 3s quiet-arm sleep is additional. Subtracting nominal 45s and measured arm4 wait from runner total leaves about 21.927s for everything else, including earlier arms, ceremonies, readiness, adapter work, code generation, snapshots, teardown, runner overhead, and any barrier overshoot. This is an accounting remainder, not a measured phase.\n\nThe prior PASS is 38.159s, so the observed increase is 41.675s, not exactly 45s. A successful arm5 exits its barrier early, whereas this run pays its whole bound. Different startup/cleanup costs and the prior unmeasured arm5 wait prevent an exact decomposition. Do not claim 'an extra 45s stall' or equate the delta with the product’s 10s poll. Source-level deadlines can overshoot because filesystem work/scheduling occurs between clock checks; neither poll has a timestamped start/end in this artifact.\n\n## Actual arm5 evidence (avoid inherited arm4 lines)\nIMPORTANT: the section labelled 're-offer broker (arm 5)' begins at L2:257 but its daemon sink includes the earlier arm4 generation. L2:320 is the old arm4 UNPRESENTED, not an additional arm5 failure. The new broker begins at L2:325 (pid24920), new brain at :330 (pid49188); the real arm5 UNPRESENTED is :390. The panic repeats captured logs again from :398; do not count repeated diagnostics as distinct attempts.\n\n* L2:340-341: ready in1712ms; livehost query wall_ms=1789398246382, mono_ms=1715.\n* L2:351-353: PTY created/input writer t_ms=229, pid55640; local controller attach wall_ms=1789398246697, mono_ms=2125.\n* L2:361-369: log_ready/drain_armed/waiter_armed at t_ms=3286; translation_ready and row_inserted t_ms=3366; ER launch spawned t_ms=3367. Same SPAWN clock gives **3057ms from input_writer to log_ready**, then **80ms from log_ready to translation_ready**. This is a concrete multi-second pre-insertion interval, not proof of its cause.\n* L2:364: another livehost query wall_ms=1789398249761, mono_ms=5093. Immediately following in merged output: CONTROL_REAP_NO_SESSION clearing controlled/driven_by/viewer_count (:365), LIVENESS_RECONCILE_OFFLINE 'no live broker session (dead harness)' (:366), then session row insertion (:368). Those two diagnostics lack their own timestamps; adjacent lines establish recorded order, not exact elapsed intervals or cross-thread causality.\n* L2:370: initial local controller writer exits wall_ms=1789398249834. ENGINE_ROOM_BROUGHT_UP :371. Control stream attach :376 wall_ms=1789398249899, mono_ms=5327. Same-log local attach (:353) → this attach is **3202ms wall-clock**, consistent with the logged startup gap.\n* L2:378: ENGINE_ROOM_BRIEFING_SWEPT drops1 undelivered old-session row, then :379-380 controller and idempotent subscribe decisions.\n* L2:381-389: another launch attempt, SPAWN_DEDUP recognizes live session1 (:387); spawned in20ms (:388); WAKE_RESUME 'online at bind' for session a91d840516a9d6ae/pid55640 (:389).\n* L2:390: new-generation ENGINE_ROOM_BRIEFING_UNPRESENTED specifically says the perch did not become a deliverable inject target within the window, retained/pending. This is neither NO-perch nor translation-binary-failure wording.\n* L2:190: row2 delivered=false, all four taker fields None, pending1, controllable=Some(true), idle=false; :395-397 confirms missing new delivered briefing panic at T:782.\n\nNote different processes’ mono_ms origins must not be subtracted indiscriminately (BRAIN_CONN_OPEN versus broker CONN_LIFECYCLE). Same SPAWN t_ms or same wall_ms event pairs above are used deliberately.\n\n## What passed assertions prove\nReaching T:782 implies all earlier arm1–3 assertions and T:699-780 succeeded. For arm4: ceremony provisioned, miss_controllable=None, exactly one briefing, loud line found after >=9s observed wait, retained row undelivered, taken_leg=None, pending1, rc4 alive. Log :189 additionally shows all taker fields None and no idle sentinel, although not all are separate arm4 assertions.\n\nFor arm5: repoint Ok, final controllable=Some(true), old retained id absent from final rows, SWEPT present in captured sink. These rule out the stated unbound-harness precondition failure and silent old-row disappearance. They do **not** show controllable=true was present throughout the product’s 10s window, nor prove complete eligibility at any sampled instant. I:37-50 additionally requires is_online=true and resolve_address=None. Final idle=false is logged but its assertion T:801-805 was **not reached**; native-inject leg and pending0 assertions T:789-799 were also not reached.\n\n## Expiration, race versus stall, and uncertainty\nPROVEN: the arm5 outer test barrier ran to deadline; the arm5 product eligibility poll separately ran to its deadline without observing complete eligibility. The emitted branch means it returned before drain_spool_native (B:2243-2283), so this recorded presentation attempt is **not evidenced as an IPC/translation drain stall**. The branch’s soft record check only says absence was not positively established; corrupt/unreadable record is still possible from that check alone.\n\nINFERENCE: a race can cause exactly these expirations: readiness/state may become eligible too late, a concurrent reconciliation may invalidate online state, or eligibility may hold only between samples. One-shot product polling stops after10s; the outer45s observes outcomes and does not restart it. Thus even a transient ordering race can leave a durable undelivered row for the remaining test interval. L2:365-368 supplies concrete ordering evidence worth tracing in product RCA, but does not independently prove which predicate failed on each poll.\n\nUNMEASURED: actual bind time; actual online/offline write times; each predicate result; presentation thread scheduling/start/end; deadline-to-UNPRESENTED lag; row2 composition timestamp; sweep timestamp; native delivery retry activity outside this worker; exact test barrier start/end/overshoot; individual ceremony and cleanup elapsed times; prior PASS phase breakdown. Therefore **duration alone does not discriminate stall versus race**, and the diagnostics narrow the observed failure to eligibility timeout without uniquely establishing its root cause."
}